A conditional branch transfers control if the specified condition is true. If the annul bit is zero, the instruction in the delay slot is always executed. If the annul bit is one, the instruction in the delay slot is not executed unless the conditional branch is taken. Note – The annul behavior of a taken conditional branch is different from that of an unconditional branch.

An unconditional branch transfers control unconditionally if its specified condition is “always”; it never transfers control if its specified condition is “never.” If the annul bit is zero, then the instruction in the delay slot is always executed. If the annul bit is one, then the instruction in the delay slot is never executed. Note – The annul behavior of an unconditional branch is different from that of a taken conditional branch.

The CALL instruction writes the contents of the PC, which points to the CALL instruction itself, into r[15] (out register 7) and then causes a delayed transfer of control to a PC-relative effective address. The value written into r[15] is visible to the instruction in the delay slot. Chapter 7 Instruction Types 7-163 When PSTATE.AM = 1, the value of the high-order 32 bits is transmitted to r[15] by the CALL instruction.

The JMPL instruction writes the contents of the PC, which points to the JMPL instruction itself, into r[rd] and then causes a register-indirect delayed transfer of control to the address given by “r[rs1] + r[rs2]” or “r[rs1] + asigned immediate value.” The value written into r[rd] is visible to the instruction in the delay slot. When PSTATE.AM = 1, the value of the high-order 32 bits transmitted to r[rd] by the JMPL instruction is zero.

The RETURN instruction is used to return from a trap handler executing in non-privileged mode. RETURN combines the control transfer characteristics of a JMPL instruction with r[0] specified as the destination register and the register-window semantics of a RESTORE instruction.

The DONE and RETRY instructions are used by privileged software to return from a trap. These instructions restore the machine state to values saved in the TSTATE register. RETRY returns to the instruction that caused the trap in order to re-execute it. DONE returns to the instruction pointed to by the value of nPC associated with the instruction that caused the trap, that is, the next logical instruction in the program. DONE presumes that the trap handler did whatever was requested by the program and that execution should continue.

The Tcc instruction initiates a trap if the condition specified by its cond field matches the current state of the condition code register specified by its cc field; otherwise, it executes as a NOP. If the trap is taken, it increments the TL register, computes a trap type that is stored in TT[TL], and transfers to a computed address in the trap table pointed to by TBA. A Tcc instruction can specify 1 of 128 software trap types. When a Tcc is taken, 256 plus the seven least significant bits of the sum of the Tcc’s source operands is written to TT[TL]. The only visible difference between a software trap generated by a Tcc instruction and a hardware trap is the trap number in the TT register. See Chapter 12, “Traps and Trap Handling” for more information.

The ILLTRAP instruction causes an illegal_instruction exception.

A NOP instruction occupies the entire (single) instruction group and performs no visible work.
NOP Instruction
There are other instructions that also result in an operation that has no visible effect:
SIR instruction executed in non-privileged mode
SHUTDOWN instruction executed in privileged mode
There are other instructions that appear to be a NOP as long as they do not affect the condition codes.