M-instructions
load; store; prefetch; register moves; miscellaneous
| Type | Instruction | Category |
| M1 | integer load | load/store |
| M2 | integer load(PI via reg.) | load/store |
| M3 | integer load(PI via imm.) | load/store |
| M4 | integer store | load/store |
| M5 | integer sotre(PI via imm.) | load/store |
| M6 | floating-point load | load/store |
| M7 |
FLP load(PI via reg.) |
load/store |
| M8 |
FLP load(PI via imm.) |
load/store |
| M9 | FLP store | load/store |
| M10 |
FLP store(PI via imm.) |
load/store |
| M11 | FLP load pair | load/store |
| M12 | FLP load pair(PI via imm.) | load/store |
| M13 | line prefetch | prefetch |
| M14 |
line prefetch(PI via reg.) |
prefetch |
| M15 |
line prefetch(PI via imm.) |
prefetch |
| M16 | (Cmp and)exchange | semaphore |
| M17 | fetch and add | semaphore |
| M18 | setf | set/get |
| M19 | getf | set/get |
| M20 | chk.s.m(int) | speculation |
| M21 | chk.s(FLP) | speculation |
| M22 | chk.a.nc/clr(int) | speculation |
| M23 | chk.a.nc/clr(FLP) | speculation |
| M24 | sync; fence; serialize | synchr. |
| M25 | flushrs | synchr. |
| M26 | invala.e | synchr. |
| M27 | invala.e | synchr. |
| M28 | flush cache | synchr. |
| M29 | move to AR(reg) | memory move |
| M30 | move to AR(imm.) | memory move |
| M31 | move from AR | memory move |
| M32 | ||
| M33 | ||
| M34 | alloc | mem misc. |
| M35 | move to PSR | mem misc. |
| M36 | move from PSR | mem misc. |
| M37 | break.m; nop.m | mem misc. |
| M38 | ||
| M39 | ||
| M40 | ||
| M41 | ||
| M42 | ||
| M43 | move from indirect reg | mem mgm |
| M44 | set/reset user mask | mem mgm |