Assistant Professor
Department of Computer Science
University of Nevada, Las Vegas
Email: .
Office: TBE-B372D
Main: (702) 895-3918
Fax: (702) 895-2639
4505 S. Maryland Parkway
Box 454019
Las Vegas, NV 89154-4019
I believe computing is at an inflection point: logic technology scaling is beginning to slow down while 3D-stackable non-volatile memories keep marching towards increased bit density and lower cost. From systems perspective, continuation of this new trend represents huge challenges in operating system and platform architecture: systems must evolve to adapt to the new balance between compute and storage, but they must do so in the least painful way for the mature computing ecosystem.
I have conducted systems research personally modifying the deepest parts of Linux kernel and Xen hypervisor. I also dabbled into processor architecture and hardware design while I was at Intel. These industry research experiences provide me unique perspective on future systems architectures that may have higher chance of real-world impact.
I am looking for a Ph.D. or Masters student who will conduct cutting-edge research on operating system and computer architecture optimized for the next-generation non-volatile memories and other emerging technologies. Candidates are expected to have hands-on experience on Linux kernel, Xen hypervisor and/or x86 system architecture.
Undergraduate student will have an opportunity to assist cutting-edge research on computer systems. Student will be exposed to low-level system software and/or simulation system for architecture development.
pmbench is a microbenchmark for measuring system paging performance with low-latency storage as swap. A paper describing pmbench download.
The SSD prototype simulates the performance of next-gen non-volatile memory over NVM Express protocol. As shown below, the SSD is currently paired with a testbench equipped with a Skylake Core i7 processor and 64GB DRAM.
This gift from Intel will help Dr. Yang conduct research on low-latency systems.
Dr. Yang presented his work on application privacy protection under an untrusted OS and storage stack optimization for low-latency SSDs. The talk also covered closely-related recent industry development such as Intel SGX on Skylake processor and Intel/Micron 3D XPoint memory.
This new kind of NVM (Non-Volatile Memory) is orders of magnitude faster than current NAND Flash and an order of magnitude denser than DRAM. In the announcement, Intel and Micron said they are planning to sample SSD (storage) and DDR (memory) products later this year and products are expected to be generally available early 2016. Before joining as a faculty at UNLV, Dr. Yang participated in pathfinding research at Intel to enable this type of next-gen NVMs in clients and servers.
My Spring 2017 office hours are: Mon/Wed 10-11am, 3-5pm
TA: Ashish Tamrakar - TA office hours: Tue/Thu 2-4pm at TBE-B361 Lab
TA: Ashish Tamrakar - TA office hours: Tue/Thu 2-4pm at TBE-B361 Lab